The AI cluster's next bottleneck isn't the chip. It's the wire between the chips, and copper is out of room.

Walk the halls of the Nangang Exhibition Center in Taipei this week and you can watch the artificial-intelligence industry quietly change the subject. SEMICON Taiwan opened its run of International Semiconductor Week events on Sunday and carries its main show through Thursday — more than 1,300 exhibitors from 65 countries, some 4,300 booths, upward of 100,000 people expected through the doors. For most of the last decade the headline act at a show like this was the transistor: how many billion of them you could draw on a chip the size of a fingernail, and how few nanometers apart. This year the busiest pavilions are about something humbler and, right now, more urgent. They are about the wire. More precisely, about the admission that the wire has run out of room.

The bottleneck in an AI cluster is no longer only the chip. It is the link between chips. A modern training run does not happen on one accelerator; it is spread across thousands of them, and those thousands have to talk to each other, and to the switches and memory around them, almost constantly. The accelerators have outgrown the thing that carries their conversation. That thing, until now, has been copper — the traces etched into a circuit board and the cables strung between racks — and copper is a physical material with physical limits that a marketing slide cannot argue away.

Where copper stops

Push an electrical signal down a copper lane fast enough and three things happen at once, and all of them are getting worse. The signal attenuates — it loses strength over distance — so that at the data rates today's switches want, a copper link stays clean for only a handful of centimeters before the receiver can no longer tell a one from a zero. To fight that loss you spend power, driving the signal harder with circuits called SerDes that turn a meaningful fraction of a switch's energy budget into heat. And the faster you go, the shorter the usable reach becomes, until you are left with a cruel arithmetic: the bandwidth an AI cluster needs and the distance it needs to carry that bandwidth can no longer both be satisfied by a wire. The figure the industry keeps repeating this week is that clusters now need to move data between their GPUs, switches and memory at rates above 100 terabits per second per node. Copper cannot carry that far enough, or cheaply enough, or cool enough.

So the industry is doing what it does when a material reaches its limit. It is changing the material. The replacement is light.

Light, moved into the package

The technology filling those Taipei pavilions goes by two names that are worth separating. Silicon photonics is the broad art of building optical components — the parts that generate, steer and detect light — out of the same silicon the industry already knows how to manufacture. Co-packaged optics, or CPO, is the specific move that matters here: instead of converting electrical signals to optical ones at a pluggable module bolted onto the front of a switch, you bring the optical engine inside the package, sitting on the same slab of substrate as the switch or accelerator chip itself. The electrons travel the shortest possible distance — millimeters — before they become photons, and then the data leaves as light down a glass fiber, which carries far more information, far further, for far less power than copper ever could.

The marquee example is Nvidia's photonics switch line, Spectrum-X and Quantum-X, built with a photonic engine co-developed with TSMC. Take the company's own figures as direction rather than gospel, the way you should always take a vendor's numbers: Nvidia claims the design uses four times fewer lasers, delivers three and a half times better power efficiency, and offers dozens of times better signal integrity than a switch that relies on conventional pluggable optics, with a single switch pushing on the order of 100 terabits per second. TSMC's platform for the optical engine, which it calls COUPE — a Compact Universal Photonic Engine — is entering production this year, including a version that stacks the photonics onto substrate alongside the logic. The Ethernet version of Nvidia's photonics switch is due through 2026, with the reported production ramp arriving in the second half. This is no longer a research poster. It is a roadmap with dates.

The industry is solving its bandwidth problem by bolting a delicate light source onto the hottest object in the rack, and then spending its cleverest engineering keeping that light cool enough to trust.

Every bandwidth number is downstream of a heat problem

Here is the part the bandwidth figures do not advertise, and the part that decides whether any of this ships in volume. Lasers hate heat. A semiconductor laser's wavelength drifts as it warms, and its reliability — the number of hours it will run before it fails — falls sharply with temperature. For years that did not much matter, because the optics lived in a pluggable module at the cool edge of the box, away from the furnace. Co-packaging throws that arrangement out. It puts the light source millimeters from a switch ASIC that can draw a kilowatt or more and runs hot enough to need aggressive cooling of its own. The entire engineering contest in CPO, underneath the throughput slides, is thermal: how do you keep a temperature-sensitive optical engine reliable while it sits next to the hottest component in the system. TSMC's substrate schemes, the various heat-path structures the vendors are showing this week, the debate over exactly where in the package the lasers should live — all of it is an answer to that one question. Every headline number about terabits is standing on a quieter number about degrees.

Follow the dependency one link further

The reassuring reading of co-packaged optics is that it relieves a bottleneck. Follow the supply chain one link further than the press release does, and it does the opposite — it adds chokepoints, because building one of these switches now requires assembling, in a single package, a set of components that each come from a very short list of suppliers. You need a photonic engine fabricated on a silicon-photonics line. You need the lasers themselves, which are made not from silicon but from exotic compound semiconductors like indium phosphide, an entirely different and more finicky manufacturing world. You need specialty glass and fiber to carry the light. You need precision micro-optics to align a beam to tolerances measured in microns. You need connectors built for optical, not electrical, mating. And you need an advanced-packaging flow able to marry all of it to a logic chip without cooking the delicate half.

Now put names to that list, because names are where the fragility lives:

• Lasers and optical components: a short roster led by Lumentum and Coherent — the compound-semiconductor specialists whose parts have no quick substitute.
• Specialty glass and fiber: Corning, one of the few firms that makes optical fiber at the required quality and scale.
• Precision optics: Largan Precision, the Taiwanese lens house better known for iPhone camera modules, reportedly preparing an automated line for CPO assembly.
• Connectors: SENKO, a name almost no one outside the optical business has heard of, doing exactly the unglamorous, indispensable job that defines a chokepoint.
• Silicon-photonics wafers: UMC, which says it has mass-produced them at its Singapore fab.
• Packaging and switch assembly: ShunSin, which reports mass-production capability for 51.2- and 102.4-terabit CPO products, and Foxconn, which expects gradual CPO switch shipments this quarter.

That list is not something I assembled by straining. Much of it is simply Nvidia's own named partner roster for its photonics program — TSMC, Coherent, Corning, Foxconn, Lumentum, SENKO. Read it twice. It is short, and a great deal of it sits on or beside a single seismically active island. The optical layer the industry is now rushing to adopt does not spread its dependencies out. It concentrates a new one.

The packaging squeeze, again

There is a second concentration hiding inside the first. The advanced-packaging capacity that already gates the supply of AI accelerators — the CoWoS-class flow at TSMC that the whole industry has spent two years waiting in line for — is the same kind of capacity co-packaged optics needs. Marrying a photonic engine to a switch die is an advanced-packaging job, and it competes for the same constrained back-end, the same tools, the same clean floor space, as the compute it is meant to feed. Adding optics to the package does not route around the packaging bottleneck. It loads more weight onto it. The wire problem and the packaging problem, which used to be separate, are becoming the same problem, and they are being solved in the same few buildings.

That is the pattern worth holding onto as the demos get brighter. The move to light is a genuine achievement — a physical wall scaled by the oldest trick the industry has, which is to change the material when the old one gives out. Copper carried the computing era about as far as it could. Glass will carry the next stretch, cooler and faster and further. But every layer the AI machine adds is another layer made somewhere specific, by someone specific, and the list of both keeps getting shorter even as the throughput numbers get longer. The industry has spent this decade relearning that intelligence is a physical good with a brutally concentrated supply chain. Co-packaged optics is the newest reminder — and now the last few centimeters of that supply chain travel as a beam of light that only a handful of firms, most of them within a short drive of one another, have yet figured out how to keep cool enough to trust.